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首页 » 电子书 » 在多数情况下,集成电路芯片的管脚不会全部被使用。例如74ABT16244系列器件最多可以使用16路I/O管脚,但实际上通常不会全部使用,这样就会存在悬空端子。所...

在多数情况下,集成电路芯片的管脚不会全部被使用。例如74ABT16244系列器件最多可以使用16路I/O管脚,但实际上通常不会全部使用,这样就会存在悬空端子。所...

于 2022-02-09 发布 文件大小:952.04 kB
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在多数情况下,集成电路芯片的管脚不会全部被使用。例如74ABT16244系列器件最多可以使用16路I/O管脚,但实际上通常不会全部使用,这样就会存在悬空端子。所有数字逻辑器件的无用端子必须连接到一个高电平或低电平,以防止电流漂移(具有总线保持功能的器件无需处理不用输入管脚)。究竟上拉还是下拉由实际器件在何种方式下功耗最低确定。-in most cases, the IC chips will not pin all been used. For example, 74 ABT16244 series device can use up to 16 Road I/O pins. but usually not all use, so there will always be vacant terminal. All digital logic device useless terminals to be connected to a serial or low-level. to prevent the current drift (with the bus maintain functional devices need not deal with the importation of pins). What to draw from the drop-down or what the actual device under way to determine the minimum power consumption.

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