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仿真RM码,及在高斯信道下的译码性能,对RM采用大数逻辑译码算法,并与单独BPSK调制在高斯信道的性能进行比较,分析上述两个码带来的编码增益。...
仿真RM码,及在高斯信道下的译码性能,对RM采用大数逻辑译码算法,并与单独BPSK调制在高斯信道的性能进行比较,分析上述两个码带来的编码增益。-RM
- 2022-02-05 04:03:09下载
- 积分:1
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很酷的一个计算器代码
很酷的一个计算器代码-a cool calculator code
- 2022-02-01 17:05:13下载
- 积分:1
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工业设计曲线显示
工业设计曲线显示-industrial design curve shows
- 2023-01-06 09:15:04下载
- 积分:1
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网上AVI转YUV还真不少,就是不简单,我的这个算是很简单的了
网上AVI转YUV还真不少,就是不简单,我的这个算是很简单的了-AVI to YUV online a lot really is not simple, my this is a very simple
- 2023-09-05 08:05:03下载
- 积分:1
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三个候选人A、B、C,根据投票者在选票上对他们编号的填写顺序记分,
!!!刚才传的6.rar说明写错了,我再传一次...
三个候选人A、B、C,根据投票者在选票上对他们编号的填写顺序记分,
!!!刚才传的6.rar说明写错了,我再传一次-Three candidates A, B, C, according to voters on the ballot paper to fill in the order they numbered Points!!! Just Chuan 6.rar the wrong note, I send a
- 2022-09-30 05:20:02下载
- 积分:1
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一个动态链接库的使用程序,对动态链接库不是很懂的兄弟,科研好好研究一下...
一个动态链接库的使用程序,对动态链接库不是很懂的兄弟,科研好好研究一下-a dynamic link library procedures for the use of dynamic link library is not really understand them brothers, look carefully at the research
- 2022-06-02 19:38:51下载
- 积分:1
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用vfp编的车辆管理软件
用vfp编的车辆管理软件-series with the vehicle management software
- 2022-04-18 15:39:56下载
- 积分:1
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it is source code for BER and PSD both mixed for communication and networking sy...
it is source code for BER and PSD both mixed for communication and networking system
- 2023-01-21 12:25:03下载
- 积分:1
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拼写检查器
拼写检查-Spelling Checker
- 2022-03-20 05:46:29下载
- 积分:1
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主要介绍了等精度频率测量原理,该原理具有在整个测试频段内保持高精度频率
测量的优点 同时在该原理基础上,采用了Verilog HDL语言设计了高速的等精度测...
主要介绍了等精度频率测量原理,该原理具有在整个测试频段内保持高精度频率
测量的优点 同时在该原理基础上,采用了Verilog HDL语言设计了高速的等精度测频
模块,并且利用EDA开发平台QUARTUS11 3 .0对CPLD芯片进行写人,实现了计数等
主要逻辑功能 还使用C语言设计了该等精度频率计的主控程序以提高测量精度。本设
计实现了对频率变化范围较大的信号进行频率测量,能够满足高速度、高精度的测频要
求。-Introduced, such as the accuracy of frequency measurement principle, the principle has in the entire test frequency to maintain the advantages of high precision frequency measurement at the same time the basis of the principle of using the Verilog HDL language, such as the design of a high-speed precision frequency measurement module, and use of EDA Development platform QUARTUS11 3 .0 on CPLD chip to write, and achieved a count of the main logic function, such as the use of C language is also designed such precision the frequency of control procedures to enhance measurement accuracy. This design achieved a wide range of frequency changes in signal frequency measurement, to meet the high-speed, high precision frequency measurement requirements.
- 2023-08-06 16:05:04下载
- 积分:1