COM simple practical examples of usage 3

XML 精要 范例 解析封装类库-example XML incisive analysis Packaging Class

数据字典生成工具，VBA编写，支持sqlserver，access和mysql数据库-create data dict to word document,made by VBA,database support just like MSSql,Access and Mysql.

基于Pro/E的塑模三维标准件库的开发，采用工具Toolkit及Visual C 6.0实现塑模标准件库的界面设计及三维建模程序的编制 -Based on Pro/E three-dimensional mold of the standard parts library development, the use of tools Toolkit and Visual C 6.0 realize mold standard parts library interface design and the preparation of three-dimensional modeling program

opc da 范例 1.进程外服务器。 　　　　2.支持异步通讯,支持回调。 　　　　3.最多支持10客户访问。 　　　　4.每客户可以最多建立10个Group对象。 　　　　5.支持Group对象的添加，删除，可以设置Group的名称，状态。 -an example. Foreign process server. 2. Support asynchronous communication, support callback. 3. Most support 10 customers visit. 4. Each customer can build up to 10 Object Group. 5. Group targets support the addition, deletion, can set the Group name, state.

多元模型回归与分析-2 matlab 程序-multiple regression model analysis with Matlab procedures-2

数字锁相环的源代码。用硬件编程语言VHDL编写。-Digital phase-locked loop

使用CFNetwork.framework实现的通信中间件。-The use of the communication middleware CFNetwork.framework implementation.

DSPack is a set of Components and class to write Multimedia Applications using MS Direct Show and DirectX technologies. DSPack is designed to work with DirectX 9 on Win9X, ME, 2000, and Windows XP operating systems. Now VMR (Video Mixing Renderer) is available on all Windows Operating Systems. DSPack 2 is designed to work with Delphi 5,6,7 and CPP -DSPack is a set of Components and class to wr ite Multimedia Applications using MS Direct Sh ow and DirectX technologies. DSPack is designe d to work with DirectX 9 on Win9X, ME, 2000, and Windows XP operating systems. Now VMR (Vide Mixing Renderer o) is available on all Windows O perating Systems. DSPack 2 is designed to work w Delphi 5, 6, 7 and praxiology CPP

基于CPLD的计数器 实现光纤测距，包含与单片机的时序控制 Verilog 实现 通过仿真-CPLD-based counters realize optical ranging, single-chip microcomputer that contains timing control and realize the adoption of Verilog simulation

线程调用参数然后输出,参数使用来控制计算的输出-Thread and then call the output parameters, parameters used to control the output of the calculation