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通软 Prolution造纸行业版产品白皮书。做行业初期研究的同志们可以...
通软 Prolution造纸行业版产品白皮书。做行业初期研究的同志们可以-Qualcomm Prolution Soft White paper industry products. Industry to do the initial research can Comrades
- 2022-07-12 03:48:19下载
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File "eap_testing.txt" from openssl
File "eap_testing.txt" from openssl-0.9.8k
- 2023-04-22 19:35:03下载
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IEC6100_1 Standards by English Documents
IEC6100_1 Standards by English Documents
- 2023-08-10 14:40:03下载
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am29lv160db数据表
Am29LV160DB datasheet
- 2023-04-26 21:25:03下载
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虚拟现实项目。该算法构建大型图像体积仁德…
virtual reality project. This algorithm for building large image to Volume rendering. Using directx
- 2022-04-27 17:23:30下载
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The JPEG Still Picture Compression Standard
The JPEG Still Picture Compression Standard
- 2022-03-26 07:53:28下载
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Here is on image processing of machine learning information
这里是关于图像处理之机器学习方面的资料--AdaBoost,自适应boosting.
非常经典的资料-Here is on image processing of machine learning information- AdaBoost, adaptive boosting. Very classical information
- 2023-05-27 00:05:04下载
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中国移动的彩信业务规范,对于才发基于彩信的业务平台和应用软件很有帮助...
中国移动的彩信业务规范,对于才发基于彩信的业务平台和应用软件很有帮助-China Mobile MMS business standards for the only fat based on the MMS platform and the business application software helpful
- 2022-05-20 13:50:29下载
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audio applicaton circuit explain
audio applicaton circuit explain
- 2022-07-07 08:49:14下载
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现代先进微处理器有非常高的集成度和复杂度,又有寄存器堆、Cache等嵌入式部件,而且芯片管脚数相对较少,必须要有一定的自测试设计和其它的可测试性设计来简化测试代...
现代先进微处理器有非常高的集成度和复杂度,又有寄存器堆、Cache等嵌入式部件,而且芯片管脚数相对较少,必须要有一定的自测试设计和其它的可测试性设计来简化测试代码,提高故障覆盖率。本文简要讨论NRS4000微处理器芯片的以边界扫描测试为主体,以自测试为补充的可测试性设计框架。着重介绍芯片的边界扫描设计和芯片中译码控制器PLA和微程序ROM以及采用内嵌RAM结构的指令Cache和寄存器堆的内建自测试设计。仿真结果表明,这些可测试性设计大大缩短了测试代码的长度。-modern microprocessors have a very high degree of integration and complexity, there Register pile, Cache such as embedded components, but Chip few relatively small, There must be the self-test design and testing of other design code to simplify testing, fault coverage. This paper briefly discussed Key words microprocessor chip to the boundary-scan test as the mainstay, Since the test to add to the test design framework. Highlighting the boundary-scan chip design and chip decoder PLA and micro-controller procedures and the use of embedded ROM RA M structure of the instruction cache and register stack of built-in self-test design. The simulation results show that these tests can greatly shorten the design of the test code length.
- 2022-04-01 18:08:40下载
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