无刷直流电机的SPWM程序,可以用来实现变频的作用

直流电机的模拟,显示并可自由设定电机的转速 接口设计源代码-DC motor simulation, shows can be free to set the motor speed interface design source code

Software easy68K use for embedded compiler (.Asm)

这是一个包含了基本操作的记事本软件，与Windows下的记事本软件相似。其中包含了所有的源代码。-This is a notebook that contains the basic operation of the software, and Windows, the software similar to Notepad. Which contains all the source code.

用传输矩阵法计算一维光子晶体的带结构的程序,用matlab所编,文件解压后,程序写在word文档中,并附有在matlab下画的图,本人感觉非常有用-use of the transfer matrix method one-dimensional photonic crystal with the structure of the program, prepared by Matlab. unpacks the files, procedures written in word document, together with the painting under Matlab plans, I feel very useful

random.zip 随机数产生器的汇编源代码 cmdsrc.zip 一个文本编辑器的汇编源代码 ourvxd.zip 一个用汇编编VxD的简单例子 foxprn.zip 一个在Fox中利用汇编语言接口程序实现打印图形的程序 amis.zip 在汇编程序中灵活运用TSRs的程序库-random.zip random number generator to compile the source code cmdsrc.zip a text editor ourvxd.zip compilation of source code used to compile a series of simple example VxD a foxprn.zip use Fox assembler language interface program print graphics procedures amis.zip in the compilation process TSRs flexibility in the use of the library

用汇编编写，接收从键盘输入的两个数，计算它们的假减乘除。-used to prepare the compilation, receiving input from the keyboard to the two the number of false calculation by multiplication and division.

Landscape key list: Right/Left - Spin landscape Forward/Back - Move in current direction either forward or backward Space - Move the water level up and down ESC - Exit-Landscape key list: Right/Left - Spin landscape Forward/Back - Move in current direction either forward or backward Space - Move the water level up and down ESC - Exit

easydetect程序，是交通灯的verilog实现-easydetect process, the traffic lights to achieve verilog

自动感应器模块,可以自动冲洗马桶.精确的比较高-Automatic sensor module, can automatically flushing toilets. The relatively high precision

定时同步是UWB通信系统中至关重要的问题，定时偏差和抖动将严重影响接收机性能。一般定时同步分为捕获和跟踪两个阶段。在捕获阶段，要求接收机快速搜索信号到达时间，并根据搜索结果调整接收机定时.-Timing Synchronization UWB communication systems is of vital importance to the issue, timing error and jitter will seriously affect the receiver performance. Timing Synchronization generally divided into two stages to capture and track. In the capture stage, the request receiver Quick Search signal arrival time, and adjust search results according to the receiver from time to time.