FUNCTIONALITY OF ATM

dct and idct vhdl code

脉动乘法器：一个GF(2m)域上的Digit-Serial 脉动结构（Systolic）的乘法器(Pulse Multiplier: a GF (2m) domain on the Digit-Serial pulsation structure (Systolic) the multiplier)

说明：  RISC 5级流水线CPU，带HAZARD处理(RISC 5 pipeline CPU with HAZARD processing)

基于FPGA实现蜂鸣器播放音乐的功能 使用芯片为EP2C8Q208C8N,使用普通蜂鸣器，由于频率不同可实现放歌功能，本例设计的是《友谊地久天长》，使用Verilog语言编程，本例子有工程文件、仿真、波形，经过测试可以使用。(Play music based on FPGA buzzer functions using chip EP2C8Q208C8N, using ordinary buzzer, since the frequency of different functions can be realized sing, in this case the design is " Auld Lang Syne" , using Verilog language programming, this project examples files, simulation, waveform, tested can be used.)

哈希算法FPGA实现代码，采用MD5算法，并给出了仿真波形。(MD5 hashing algorithm for FPGA implementation code)

emmc控制芯片CMD命令线主机接口模块,(emmc control chip CMD command line host interface module)

This is a running 10 bit led on VHDL code including switch to shift from increasing or decreasing

xilinx verilog FPGA驱动AD9613 数据采集DEMO程序(Xilinx Verilog FPGA drives AD9613 data acquisition DEMO program.)

说明：  经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。(FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.)