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各种不同的方式显示系统时间,
这仅仅是一个小的程序,熟悉
vc编程过程...
各种不同的方式显示系统时间,
这仅仅是一个小的程序,熟悉
vc编程过程-various ways display system, this is only a small familiar with the procedures vc programming process
- 2023-01-14 22:55:03下载
- 积分:1
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public class Server extends Thread { Client client int counter public Server(Cli...
public class Server extends Thread { Client client int counter public Server(Client _client) { this.client = _client this.counter = 0 } public void run() { while (counter < 10) { this.client.queue.addElement(new Integer(counter)) counter++ } throw new RuntimeException("counter >= 10") } public static void main(String[] args) { Client c = new Client() Server s = new Server(c) c.start() s.start() } } class Client extends Thread { Vector queue public Client() { this.queue = new Vector() } public void run() { while (true) { if (! (queue.size() == 0)) { processNextElement() } } } private void processNextElement() { Object next = queue.elementAt(0) queue.removeElementAt(0) System.out.println(next)-public class Server extends Thread { Client client int counter public Server(Client _client) { this.client = _client this.counter = 0 } public void run() { while (counter lt; 10) { this.client.queue.addElement(new Integer(counter)) counter++ } throw new RuntimeException("counter gt;= 10") } p
- 2022-02-21 05:44:37下载
- 积分:1
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时钟类的实现,熟悉析构函数,构造函数,成员函数,并声明一个静态成员,完成实现...
时钟类的实现,熟悉析构函数,构造函数,成员函数,并声明一个静态成员,完成实现-The realization of the clock type, familiar with the destructor, constructor, member functions, and a member of a static statement, the completion of the realization of
- 2023-01-02 22:15:05下载
- 积分:1
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带bevel线的静态控件
带bevel线的静态控件-The static control with beve line
- 2023-08-18 11:15:03下载
- 积分:1
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ftp客户端实现 ftp客户端实现
ftp客户端实现 ftp客户端实现-ftp client to achieve the c lient achieve ftp ftp client achieve customer households-realization
- 2023-04-15 10:15:03下载
- 积分:1
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一个类似磁盘扫描得界面,很酷得哦,值得大家去研究
一个类似磁盘扫描得界面,很酷得哦,值得大家去研究-a disk scan in a similar interface, cool in, oh, we should study
- 2022-05-20 19:52:23下载
- 积分:1
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This packet is a IS
This packet is a IS-95 baseband simulation for 1 data channel of 9.6 KBps rate. The simulation is written for static channel and AWGN noise.
- 2022-06-01 03:58:24下载
- 积分:1
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时钟模块之一:二进制转BCD码verilog源代码FPGA advantage编程环境...
时钟模块之一:二进制转BCD码verilog源代码FPGA advantage编程环境-clock module : BCD switch binary source code Verilog FPGA advantage programming environment
- 2023-09-08 18:40:03下载
- 积分:1
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一个非常好看的控制条控件,使用的时候先用regsvr32.exe slider.ocx注册即可使用。...
一个非常好看的控制条控件,使用的时候先用regsvr32.exe slider.ocx注册即可使用。-a very attractive on the control of the controls, the use of the time by using the regsvr32.exe slider.ocx registration can be used.
- 2022-06-26 09:28:51下载
- 积分:1
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一个垂直滚动文本的例子,推荐下载
一个垂直滚动文本的例子,推荐下载-A vertical scrolling text examples, recommended download
- 2022-04-18 16:50:13下载
- 积分:1