这个信息有100个实例，是一个很好的学习参考。对于那些水

自己写的7人表决器的verilog程序，实现4人以上通过则通过的功能。(Seven people to write their own voting machine verilog program to achieve four or more people pass through function.)

说明：  Verilog实现的加减法功能计数器，通过独立的自增自减信号控制计数器进行自增计数和自减计数(Function counter of addition and subtraction implemented by Verilog)

这是一个VHDL项目，用于在VIRTEX-4 xc4vsx35 FPGA板中执行接收信号的14位ADC。

基于TCAM的高速路由查找，逻辑实现深度为32的内容查找，得到索引和命中指示(TCAM lookup based on a high-speed routing logic to realize the depth of content to find 32, get indexed and hit instructions)

Frecuencymeter digital, clk frequency 10 MHZ, exhibition in 7 segments

非常好的EPM570(CPLD)学习程序源码,适合初学者,能让其快速入门(Very good EPM570 (CPLD) learning program source code, suitable for beginners, allowing its Quick Start)

(Springer Series in Advanced Microelectronics 51) Ayan Palchaudhuri, Rajat Subhra Chakraborty (auth.)-High Performance Integer Arithmetic Circuit Design on FPGA_ Architecture, Implementation and Desig

一个简单的429协议实现的VHDL语言代码，具备基本的429数据字的收发功能，并且仿真通过，效果一般。(A simple 429 protocol to realize the VHDL language code, with basic data words of 429 transceiver functions, and through simulation, the effect of general.)

de2开发板上的一个小程序 模60的计数器/分频器(de2 board developed a small program module 60 of the counter/divider)

有关gal器件的编程入门，以及常见逻辑门、计数器VHDL程序(For gal device programming entry, as well as common logic gates, counters VHDL program)