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ran_num_generator.tar
vhdl random numbergenerater
- 2013-04-10 16:31:28下载
- 积分:1
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xspUSB
说明: 关于usb调试相关测试 代码,用于测试和适配等(usb coding for testing , verigy, for studing usb and fpga)
- 2020-06-22 23:00:01下载
- 积分:1
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sinwave
使用verilog hdl语言编程正弦波信号,能仿真出结果(Can use verilog HDL language programming sine wave signal, the simulation results
)
- 2013-09-18 15:27:27下载
- 积分:1
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velocity_Verilog
速度表(velocity)要求:1.显示汽车Km/h数;2.车轮每转一圈,有一传感脉冲;每个脉冲代表1m的距离;3.采样周期设为10s;
4.要求显示到小数点后边两位;5.用数码管显示;6. 最高时速小于300Km/h。(约为83.3m/s)
(use verilog to realize velocity)
- 2020-07-13 15:08:51下载
- 积分:1
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emif2axi_v1_00_a
说明: emif接口转axi接口,在多个项目中使用,功能完善(EMIF interface to Axi interface, used in many projects, perfect function)
- 2020-12-01 15:29:26下载
- 积分:1
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i2c_master_top
i2c core : i2c master top
- 2012-05-23 01:17:22下载
- 积分:1
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FPGAshiyan(4)
FPGA入门系列实验教程——实验四.LED跑马灯(Getting Started with FPGA tutorial series of experiments- Experiment IV. LED Marquee)
- 2010-11-05 17:44:05下载
- 积分:1
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daojishi
用VHDL实现60秒倒计时的功能
倒计时为0时蜂鸣器持续响起(Continued sounded to achieve 60 seconds of the countdown function with VHDL countdown to the 0:00 buzzer)
- 2021-05-07 07:28:36下载
- 积分:1
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verilog编写的4端口驱动lcd1602
verilog编写的4端口驱动lcd1602,一般的都是8端口驱动,我的开发板是spartan3e的上面的lcd1602是死端口驱动的,当时找了各种资料才自己琢磨出来的,上传出来供大家参考一下!
- 2022-03-04 01:22:12下载
- 积分:1
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shuangerxuanyi
说明: quartusii软件仿真实验代码 双二选一(quartusii software simulation code for a pair of two elections)
- 2010-04-10 12:02:49下载
- 积分:1