TOA定位

基于FPGA的DDS算法的实现，已经通过FPGA的后端仿真实现-FPGA-based algorithm cordic, has passed the back-end FPGA simulation

一个编译器的源程序，非常有实用价值 一个编译器的源程序，非常有实用价-a compiler of the source of great practical value to a compiler source, a very practical price

通俗的介绍了ise的使用方法，对vhdl和verilog开发的初学者来说是不错的选择-popular introduction to the use of the method ideally, the VHDL and Verilog development of the newcomer is a good choice

本程序用于测试实时时钟模块SD2000的SRAM存储器D/E系列， 程序功能如下： 1. 关闭/INT1及/INT2的中断输出 2. 初始化时间(写时间数据) 3. 在BREAKPOINT1设断点时,依次读时间-写SRAM数据-读SRAM数据循环 4. 全速执行时,LED四位分别显示小时和分钟的值-procedures used to test the real-time clock module SD2000 SRAM memory D/E Series, procedures following functions : 1. Closed/INT1 and/INT2 the interruption of output 2. Initialization time (the time to write data) 3. Located in BREAKPOINT1 breakpoint, followed by time for-write SRAM data-reading cycle of four data SRAM. full speed of implementation, respectively, four LED display hours and minutes values

一个水产养殖池产品： 1：加温功能 2：水循环功能 3：排气功能等(Aquaculture pool products: 1: heating function 2: the water cycle functions: exhaust function.)

说明：  英特尔(intel)815主板PCB板文件(PCB files of Intel 815 motherboard)

Two other retailers, Marks& Spence

说明：  单相半波可控整流电路电阻负载，实现单相整流电路的正常工作测试(Single_phase_hw_R.mdl)

对直扩信号采用倒谱法进行功率谱分析，检测高端周期脉冲谱线(Cepstrum signal power spectrum analysis using cepstrum method, detection of high-end periodic pulse line)

说明：  简单实现人机对战，使用人工智能简单算法,通过人和机器的博弈，使机器通过迭代自己判断所走的步骤。(This code simply realizes man-machine combat in chess.)