非均匀有理B样条.皮尔

在Matlab/ Simulink 环境下给出了仿真模型结构框图和在两种瞬态工况下的仿真结果

Acute3D Viewer 4.0版本浏览器（32 64位系统），大家速度

matlab色散补偿程序，光谱仪采集到的数据进行一系列变换，画出耦合曲线的图

基于MATLAB复调制ZOOM-FFT算法的分析和实现2006年第4期舰船电子工程121滤波;使用函数来实现傅立叶变换次复数乘法。设数字滤波器的阶数为K,滤波器系数离线生成,则滤波需要DNK次复数乘法,则总4 Matlab仿真和验证的运算量为为验证上述算法及分析过程的正确性,在MatZFFTNloN+2N+DN·K(3)中产生一个正弦组合信号3随着细化倍数的增加,基带FFT和ZFFT的运算量x(t)=30cos(2m110t)+30cos(2x11145t)都会大幅度增加;zFF只有当细化频带较窄(此时+25cos(2x112.3t)+48cos(2m113.8t)无需数字滤波)或长序列的情况下,与基带FT相+50co(2x114.5t)比才具有运算量上的优势。分别利用基带FT和ZT对其进行谱分析ZFT算法存在自身的局限性,其存在的问题仿真条件:f=2048H,F点数N=1024,细化倍数D=50。基带FFT的频率分辨率4f=2H,历如下:(1)需要存放中间数据的内存空间巨大限制ZF的频率分辨率△f=0.04H。仿真结果如图了最大细化倍数2和图3所示。(2)采用具有线性相位的FIR数字滤波器实igure(n现抗混叠滤波,由于有限阶滤波器的吉布斯效应( Gibbs effect),滤波器截止频率处的频谱不可避免020040060080010001200会出现局部失真。(3)细化倍数越高,重釆样的选抽比越高,则细化带宽越窄。当需要细化的带宽较大时,必须进5行多次细化,这势必会增加计算量。Figure(4)频率成分调整较复杂。将FT和谱分析105110115130得到的频率成分调整到所选频带的频率成分式较Frequency(Hz复杂的过程,特别是为了避免低通抗混滤波器的边图3FF幅值频谱缘误差造成的频率混叠为了比较频率细化的效果,对图中谱线作了归化处理。图2中fgme(a)为原始信号,fgme(c)6小结为基带FYT处理后的幅值谱线,fgre(d)为移频后ZFT算法的关键在于利用傅立叶变换的移频基带FFT处理后的幅值谱线。由此图可以看出,基特性将感兴趣的高频段频率移至频谱原点,降低采带FFT的几个谱峰叠加为一个谱峰,各频率成分不可分辨。图3中fge(g)为重新采样后F处理样率重新釆样,从而获取较高的频率分辨率。它对后的幅值谱线,gure(h)为频率调整到实际频率处于获得某些特殊频段而不是整个带宽的信号细微的幅值谱线。此图中,因频率分辨率降低了D倍谱结构十分有用。该算法在实际工程技术中有较zF的幅值谱线中5条谱线清晰可见,说明ZF广泛的应用效果明显。参考文獻5ZF运算量和局限性讨论[1]胡广书.数字信号处理-理论、算法与实现[M]北京:清华大学出版社,1997当采用时域抽取FFT算法时,N点DT的复数[2] Vinay K ingle, John g proakis.数字信号处理及其乘法次数为l2N,复数加法次数为NN。为MATLAB实现[M].北京:电子工业出版社,1998[3]赵霞,熊小伏,郭珂.用细化频谱技术分析断路器简单起见,仅比较两种算法的复数乘法次数。操动机构振动信号[J.电力系统自动化,2003,(12):37设频率分辨率4f=fN,细化倍数D=△/404」f。要获得4/的分辨率,基带FFT的运算量为[4]丁康,谢明,张彼德等.基于复解析带通滤波器的FrTdN)lo复调制细化谱分析原理和方法[J.振动工程学报,2001,62(D14(1):30~35采用ZF算法,在复调制时只计算重采样的[5]宗孔德.多抽样率信号处理[M].北京:清华大学点,需N次复数乘法。同样,调制系数的计算也需N出版社,19基于 MATLAB复调制Z00M-FT算法的分析和实现旧WANFANG DATA文献链接作者:王力,张冰,徐伟, Wang li, Zhang bing, Xu Wei作者单位:王力,张冰, Wang Li, Zhang bing(江苏科技大学,镇江,212003),徐伟, Xu Wei(船舶系统工程部,北京,100036)刊名:舰船电子工程英文刊名SHIP ELECTRONIC ENGINEERING年,卷(期)2006,26(4)被引用次数:次参考文献(5条)1.宗孔德多抽样率信号处理19962.丁康;谢明;张彼德基于复解析带通滤波器的复调制细化谱分析原理和方法[期刊论文]振动工程学报2001(013.赵霞;熊小伏;郭珂用细化频谱技术分析断路器操动机构振动信号[期刊论文]电力系统自动化2003(12)4.陈怀琛数字信号处理教程- MATLAB释义与实现19985.胡广书数字信号处理一理论、算法与实现1997本文读者也读过(6条江波.唐普英基于复调制的ZooⅷFFT算法在局部频谱细化中的研究与实现[期刊论文]-大众科技2010(7)2.丁康.谢明.张彼德.赵玲.张晓飞. Ding Kang. Xie ming. Zhang bide. Zhao ling. ZHANG Xiaofei基于复解析带通滤波器的复调制细化谱分析原理和方法[期刊论文]-振动工程学报2001,14(1)3.罗利春. LUo Lic- hun zoom-FFT的改进、频谱反演与时-频局部化特性[期刊论文]-电子学报2006,34(1)4.戴振华.纪海林.徐运涛.DAⅠZhen-hua. JI Hai-1in.ⅫUYun-taoZ00MFFT算法在数字音频分析仪中的实现[期刊论文]-兵工自动化2007,26(10)5.黄镔.许婧.高峰.束洪春Z0OM-FFT在水电机组振动信号分析中的应用[期刊论文]-昆明理工大学学报(理工版)2002,27(5)6.王卫江改进的自适应Zoom-FFT算法研究[期刊论文]一电子技术应用2006,32(7)证文献(10条1.程兆刚.唐力伟.张淑琴.曹洪娜基于复调制Z0OM-FFT算法下阻尼比识别的研究[期刊论文]计算机与数字工程2012(1)2.刘树强.罗天.王宁.潘栋基于 Labview的异步电机转子断条检测[期刊论文]电子设计工程2011(3)3.王文森.邱宏安高精度超声流量检测系统设计[期刊论文]电声技术2011(2)4刘树强.罗天.谭兴文基于 Labview的笼型异步电动机转子断条故障在线检测系统[期刊论文]西南大学学报:自然科学版2011(9)5.王乐.苏小敏.杜林.李春化复白噪声中复正弦波频率估计方法硏究[期刊论文]火控雷达技术2011(36.周红霞.江佩勤.伍洲基于嵌入式系统的ZFFT移频轨道检测算法[期刊论文]通信技术2010(37.焦玮琦.陈特放基于局部频谱细化的轨道移频信号高精度检测[期刊论文]机车电传动2009(28.史瑞根.姚金杰基于 Labview的数字变频FFT设计[期刊论文]现代电子技术2009(7)9武中奇.杨世武丌FT算法在铁路移频信号分析中的应用及其DSP实现[期刊论文]铁道通信信号2008(7)10.时献江.张春喜.邵俊鹏异步电机断条故障诊断的细化包络方法[期刊论文]电机与控制学报2008(2)本文链接http://d.g.wanfangdata.com.cn/periodicaljcdzgc200604033.aspx

A Practical Guide for SystemVerilog Assertions+SystemVerilogForDesign+SystemVerilogforVerificationSystemVerilog三本经典书打包

Matlab 官方有关于HDL coder开发的详细技术文档， HDL Coder可以把Simulink模型、MATLAB代码和Stateflow框图生成位真、周期精确、可综合的Verilog和VHDL代码，很适合用于FPGA/ASCI的快速开发，里面还有大量的例程等等ContentsHDL Code generation from MATLaBMATLAB Algorithm DesignData Types and scope1-2Supported data TUsuppyted data type1-3Scope for variables1-3Operators1-4Arithmetic operate1-4Relational operators1-4ogical Operators1-5Control flow statements1-6Vector Function Limitations related to Control1-7PersistentⅤ ariables1-8Persistent Array variables1-10Complex data Type Support1-11Declaring complex signaIs1-11Conversion Between Complex and real signals1-12Support for vectors of Complex Numb1-12ystem Objects1-14Why use System objects?1-14Predefined System Object1-14User-Defined System ob1-14Limitations of HDL Code Generation for SystemObjects1-15System object Examples for HDL Code Generation.. 1-16Predefined System Objects Supported for HDL CodeGeneration1-17Load constants from a mat-file1-18Generate Code for User-Defined System Objects1-19How To Create a User-Defined System object1-1User-Defined System object Example1-19Map Matrices to ROM1-22Fixed-Point bitwise Functions1-231-23Bitwise Functions Supported for HDl Code Generation 1-23Fixed-Point Run-Time Library functions1-29Fixed-Point function limitations1-33Model State with Persistent variables and SysteObjects1-34Bit Shifting and bit rotation1-8Bit Slicing and Bit Concatenation1-41Guidelines for Efficient hdL code1-43MATLAB Design Requirements for HDL CodeGeneration1-44What is a matlab test bench?1-45MATLAB Test Bench Requirements and bestractices1-46MATLAB Test Bench requirements1-46MATLAB Test bench best practices1-46ContentsMATLAB Best Practices and Design Patterns forHDL Code generation2Model a counter for hdl code generation2-2MATLAB Counter2-2MATLAB Code for the counter2-3Best Practices in this Example2-4Model a state machine for HDL Code Generation2-5MATLAB State machinesMATLAB Code for the Mealy State MachineMATLAB Code for the moore state machine2-7Best practic2-9Generate hardware Instances For local functions2-10MATLAB Local functions2-10MATLAB Code for mlhdlc two counters. m2-10Implement RAM USing MATLAB Code2-13Implementation of RAM2-13Implement RAM Using a Persistent Array or Systemobject Properties2-13Implement RAM Using hdl. RAM2-14For-Loop best Practices for HDL Code generation2-16MATLAB Loops2-16Monotonically Increasing Loop Counters2-16Persistent Variables in Loops2-17Persistent Arrays in Loops2-17Fixed-Point Conversion3Floating-Point to Fixed-Point Conversion3-2Fixed-Point Type Conversion and Refinement3-16Working with Generated Fixed-Point Files3-26Specify Type Proposal Options3-33Log Data for Histogram3-37Automated Fixed-Point Conversion3-40License Requirements3-40Automated Fixed-Point Conversion Capabilities3-40Code Coverage3-42Proposing Data Types3-45Locking Proposed Data Types3-47Viewing functions3-47lew1ariables3-48Istogram ...3-54Function Replacements3-56Validating Types3-57g Numerics3-57Detecting Overflows3-57Custom plot functions3-59Visualize Differences Between Floating-Point and Fixed-Point results3-61Inspecting Data Using the Simulation Data Inspector 3-67What Is the Simulation Data Inspecto3-67Import Logged Data3-67Export Logged data3-67Group signals3-67Run options3-68Create Report3-68Comparison Options3-68Enabling Plotting Using the Simulation Data Inspector 3-68Save and Load simulation Data Inspector Sessions3-68Enable Plotting Using the Simulation Data Inspector 3-70From the UI3-70From the Command Line3-70Replacing Functions Using Lookup TableApproximations·3-72Replace a custom function with a lookup Table3-73From the UI3-73i ContentsFrom the Command line3-81Replace the exp Function with a Lookup Table3-84From the ui3-84From the Command line3-92Data Type Issues in Generated Code3-94Enable the highlight Option in a MaTLAB CoderProject3-94Enable the Highlight Option at the Command Line... 3-94Stowaway doubles3-94Stowaway singles3-94Expensive Fixed-Point operations3-94Code GenerationCreate and set Up Your Project4-2Create a New Project4-2Open an Existing ProjectAdd Files to the project4-4Primary Function Input Specification4-6When to Specify Input Properties4-6Why You must Specify Input Properties4-6Properties to Specify4-6Rules for Specifying Properties of Primary Inputs4-8Methods for Defining Properties of Primary Inputs4-8Basic hdl code generation with the workflowAdvisor4-10HDL Code Generation from System Objects4-14Generate Instantiable code for functions4-19How to generate Instantiable Code for Functions4-19Generate Code Inline for Specific Functions4-19Limitations for instantiable code generation forFunctions4-19Integrate Custom HDL Code Into MATLAB Design.. 4-21Define the hdl. Black Box System object4-21Use System object In MATLAB Design Function4-23Generate HDL Code4-23limitations for hdl. black box4-26Enable matLab function block generation4-27Requirements for MaTLAB Function Block Generation 4-27Enable matlab function block generation4-27Results of matlab function block generation4-27System Design with HDL Code Generation fromMATLAB and simulink4-28Generate Xilinx System Generator Black Box Block4-32Requirements for System Generator Black Box BlockGeneration4-32Enable System Generator black Box block GeResults of System Generator Black Box Bloc neration4-32Generation4-33Generate Xilinx System Generator for DsP black boxfrom MATLAB HDL Design4-34Generate HDL Code from MATLAB Code Using theCommand line interface4-40Specify the Clock Enable rate4-45Why specify the clock Enable rate?4-45How to Specify the clock Enable rate4-45Specify Test Bench Clock Enable Toggle rate4-47When to Specify Test Bench Clock Enable Toggle rate4-47How to Specify Test Bench Clock Enable Toggle rate4-47Generate an HDL Coding Standard report fromMATLAB4-49Using the hdl Workflow advisor4-49Using the Command Line4-51Generate an HDL Lint Tool script4-53How To generate an hdl lint Tool Script4-53ContentsGenerate a Board-Independent Ip core from MATLAB 4-55Generate a board-Independent Ip core4-55Requirements and Limitations for IP Core generation4-57Minimize clock enables4-58Using the GUi4-59Using the Command Line4-59Limitations4-59VerificationVerify Code with HDL Test Bench5-2Generate Test bench with file i/oWhen to Use file i/o In Test bench5-5How Test bench generation with file i/o works5-5Test Bench Data files5-5How to generate Test bench with file i/o5-6Limitations When Using File 1/0 In Test Bench5-6DeploymentGenerate Synthesis Scripts6-2Optimization7RAM Mapping7-2Map persistent Arrays and dsp. Delay to RAM7-3How To Enable RaM Mapping7-3RAM Mapping requirements for Persistent Arrays andSystem object PropertiesRAM Mapping Requirements for dsp. Delay Systemob7-6RAM Mapping Comparison for MATLAB Code7-8Pipelining7-9Port registers7-9Input and Output Pipeline registers7-9Variable pipelining7-9Register Inputs and Outputs7-10Insert Input and Output Pipeline registers7-11Distributed Pipelining7-12What is Distributed Pipelin7-12Benefits and Costs of Distributed pipelining7-12Selected Bibliograph7-12Pipeline matlab variables7-13Using the hdl Workflow Advisor7-13Using the Command Line Interface7-13Limitations of MatlAB Variable Pipelining7-13Optimize MatLAb loops7-15oop Streaming7-15Loop unrolling7-15How to Optimize maTLaB loops7-15Limitations for MaTLAB Loop Optimization7-16Constant Multiplier optimization7-17Specify constant multiplier optimization7-19Distributed Pipelining for Clock Speed Optimization7-20Map Matrices to Block RAMs to Reduce Area7-27Resource Sharing of Multipliers to Reduce Area7-32Loop streaming to Reduce Area7-41Contents

【实例简介】单相桥式半控整流 simulink建模仿真，该为PDF文件，可以对应自己画出电路模型，该文件含有，模型图，波形图。

视频采集

本人在给予vs2012 c#编写的一个简答的winform换肤方法，方便大家快速预览皮肤的样式，以便应用，不足之处还请多指正，谢谢~~~

本人毕设语音增强全套代码，呕心沥血之作，买到就是赚到（.m）