java实现微信公众号模版消息推送

Delta并联机器人逆解程序，自己写的，正逆解完全可以对照上。

The Verilog® Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEEStd 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in astandard textual format for a variety of design tools, including verification simulation, timiThe clear directive from the users for these three task forces was to start by solving some of the followingproblemsConsolidate existing IeeE Std 1364-1995Verilog generate statementMulti-dimensional arraysEnhanced Verilog file i/oRe-entrant tasksStandardize Verilog configurationsEnhance timing representationEnhance the vpi routinesAchievementsOver a period of four years the 1364 Verilog Standards Group(vsg) has produced five drafts of the lrmThe three task forces went through the EEe Std 1364-1995 lRM very thoroughly and in the process of consolidating the existing Lrm have been able to provide nearly three hundred clarifications and errata for theBehavioral, ASIC, and PLI sections. In addition, the vsg has also been able to agree on all the enhance-ments that were requested (including the ones stated above)Three new sections have been added. Clause 13, "Configuring the contents of a design, deals with configuration management and has been added to facilitate both the sharing of verilog designs between designersand/or design groups and the repeatability of the exact contents of a given simulation session Clause 15Timing checks, "has been broken out of Clause 17, "System tasks and functions, "and details more fullhow timing checks are used in specify blocks. Clause 16, "Backannotation using the Standard Delay Format(SDF), addresses using back annotation(IEEE Std 1497-1999)within IEEE Std 1364-2001Extreme care has been taken to enhance the vpi routines to handle all the enhancements in the behavioraland other areas of the lrm. minimum work has been done on the pli routines and most of the work hasbeen concentrated on the vpi routines. Some of the enhancements in the vpi are the save and restart simu-lation control, work area access, error handling, assign/deassign and support for array of instances, generateand file 1/0Work on this standard would not have been possible without funding from the cas society of the ieee andOpen verilog InternationalThe IEEE Std 1364-2001 Verilog standards Group organizationMany individuals from many different organizations participated directly or indirectly in the standardizationprocess. The main body of the Ieee Std 1364-2001 working group is located in the United States, with asubgroup in Japan (EIAJ/1364HDL)The members of the IEEE Std 1364-2001 working group had voting privileges and all motions had to beapproved by this group to be implemented the three task forces focused on their specific areas and theirrecommendations were eventually voted on by the Ieee Std 1364-2001 working group

扩频通信 田日才 课件及习题答案，很难得的一个资料，网上几乎找不到的

在matlab平台下实现仿真CDMA码分多址通信信号调制信号产生、瑞丽衰落信道以及RAKE接收机的仿真测试程序，能够测试误码率等通信性能。

旅游网设计代码php及时聊天功能（java实现）pushlet推技术 数据库 分析文档

内点法的机组组合程序，采用不可行内点启动的原对偶线性规划内点法，采用了稀疏技术

适合新手练习的的源码，包括html，css，javascript，可以下载模仿练习，适合入门级，

1、原论文及matlab仿真程序；2、提出一种基于非线性干扰观测器的滑模变结构控制方法。用一种非线性干扰观测器观测系统的不确定性和外界干扰，通过选择设计参数，可以使观测误差指数收敛。对引入非线性干扰观测器后的系统设计滑模变结构控制控制器，控制律的设计能够减小滑模抖震，保证闭环系统的稳定性，从而达到了对俯仰系统跟踪控制的目的。仿真结果表明，该方法能够较理想地观测干扰，减小控制器的输出，改善系统的控制性能。

遥感影像场景变化检测经典算法(IR-MAD、MAD、CVA、PCA)算法集锦，包含其算法Code 和 Demo，另外，含有算法的评价函数OA、Kappa、AUC、ROC曲线，分享学习，批评指教。

滑动轴承磨损abaqus有限元分析，使用了abaqus自适应网格进行了仿真分析，非常有用！