有关同态滤波的相关资料及matlab代码

灰色关联度分析法是将研究对象及影响因素的因子值视为一条线上的点,与待识别对象及影响因素的因子值所绘制的曲线进行比较,比较它们之间的贴近度,并分别量化,计算出研究对象与待识别对象各影响因素之间的贴近程度的关联度,通过比较各关联度的大小来判断待识别对象对研究对象的影响程度。关联度计算的预处理，一般初值化或者均值化，根据我的实际需要，本程序中使用的是比较序列与参考序列组成的矩阵除以参考序列的列均值等到的，当然也可以是其他方法。

The Verilog® Hardware Description Language (Verilog HDL) became an IEEE standard in 1995 as IEEEStd 1364-1995. It was designed to be simple, intuitive, and effective at multiple levels of abstraction in astandard textual format for a variety of design tools, including verification simulation, timiThe clear directive from the users for these three task forces was to start by solving some of the followingproblemsConsolidate existing IeeE Std 1364-1995Verilog generate statementMulti-dimensional arraysEnhanced Verilog file i/oRe-entrant tasksStandardize Verilog configurationsEnhance timing representationEnhance the vpi routinesAchievementsOver a period of four years the 1364 Verilog Standards Group(vsg) has produced five drafts of the lrmThe three task forces went through the EEe Std 1364-1995 lRM very thoroughly and in the process of consolidating the existing Lrm have been able to provide nearly three hundred clarifications and errata for theBehavioral, ASIC, and PLI sections. In addition, the vsg has also been able to agree on all the enhance-ments that were requested (including the ones stated above)Three new sections have been added. Clause 13, "Configuring the contents of a design, deals with configuration management and has been added to facilitate both the sharing of verilog designs between designersand/or design groups and the repeatability of the exact contents of a given simulation session Clause 15Timing checks, "has been broken out of Clause 17, "System tasks and functions, "and details more fullhow timing checks are used in specify blocks. Clause 16, "Backannotation using the Standard Delay Format(SDF), addresses using back annotation(IEEE Std 1497-1999)within IEEE Std 1364-2001Extreme care has been taken to enhance the vpi routines to handle all the enhancements in the behavioraland other areas of the lrm. minimum work has been done on the pli routines and most of the work hasbeen concentrated on the vpi routines. Some of the enhancements in the vpi are the save and restart simu-lation control, work area access, error handling, assign/deassign and support for array of instances, generateand file 1/0Work on this standard would not have been possible without funding from the cas society of the ieee andOpen verilog InternationalThe IEEE Std 1364-2001 Verilog standards Group organizationMany individuals from many different organizations participated directly or indirectly in the standardizationprocess. The main body of the Ieee Std 1364-2001 working group is located in the United States, with asubgroup in Japan (EIAJ/1364HDL)The members of the IEEE Std 1364-2001 working group had voting privileges and all motions had to beapproved by this group to be implemented the three task forces focused on their specific areas and theirrecommendations were eventually voted on by the Ieee Std 1364-2001 working group

温度传感器PT100是一种稳定性和线性都比较好的铂丝热电阻传感器,可以工作在 -200℃ 至 650℃ 的范围.本电路选择其工作在 -19℃ 至 500℃ 范围.整个电路分为两部分,一是传感器前置放大电路,一是单片机 A/D 转换和显示,控制,软件非线性校正等部分.

此文件主要是关于TC358870的显示配置设置文件，以及使用说明，文件自带英文说明，中文说明是我翻译的，翻译不对的地方大家谅解。

本资源是本人毕业设计部分代码，已通过Cyclone II开发板验证，实现了HDB3码的编码及译码功能

通信专业学生完成的：基于simulink的直序扩频通信系统设计报告一、直序扩频通信系统设计原理二、模块功能分析（一）信源信号产生（二）扩频码产生与扩频调制（三）载波调制（四）信道（五）解扩（六）解调（七）误码和频谱分析

先进PID控制MATLAB仿真第3版完整仿真程序

对于要了解核电站反应堆运行过程的还可以借鉴

这是国际上第一本专门介绍宽带波束形成的专著，涵盖了近年来作者在这方面的大部分成果以及一些常用的算法，内容囊括了该方向的几乎所有的参考文献，适合该方向的初学者阅读。

基于STM32F103C8T6最小系统板的双路ADC采样程序，可以同时采集两个模拟量的值