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adder

于 2020-12-21 发布
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代码说明:

说明:  用hspice写了一个做了16bit kogge stone四层点操作的树形加法器静态逻辑网表,所有管子的尺寸按照0.25u的尺寸设计挂上测试文件跑以后逻辑没问题,但是按照拉贝尔那本书上讲的关于逻辑努力优化的方法优化,在输入级加了两级buffer,只对最长路径支路尺寸优化(Use HSPICE to write a 16bit kogge made stone four layer tree adder static logic netlist, all pipe sizes according to the size of design 0.25u hang test file to run after the logic is no problem, but in accordance with the method of logic optimization efforts of Labelle's book about the optimization, plus two buffer in the input stage, only the longest path branch size optimization)

文件列表:

adder_stat_op.sp, 13755 , 2012-02-25
stimuli_stat.vect, 1278 , 2011-01-05
cmos25_level49.lib, 14695 , 2011-12-01
adder_stat.sp, 9874 , 2012-02-25
read_me.txt, 45 , 2012-02-26

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