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quickStartOMAPL1x_rCSL_1.0
平台支持包,可供bios系统支持标准外设驱动(Platform support package for BIOS system to support standard peripheral drivers)
- 2020-06-18 16:00:02下载
- 积分:1
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Processor Scheduling : Web Act by scheduling algorithm randomly generated number...
处理机调度:按轮转法调度算法 随机产生进程的个数及到达时间。-Processor Scheduling : Web Act by scheduling algorithm randomly generated number and the process of arrival time.
- 2022-01-21 23:44:07下载
- 积分:1
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基于行驶车速的车辆防撞时间预警算法_刘庆华
多种工况的碰撞预警算法文献,分为直线碰撞与侧面碰撞,不错的文献,一起学习(V2X collsion worming)
- 2021-04-02 20:09:06下载
- 积分:1
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RA-NOMA-master
说明: NOMA,可以进一步使用自己的优化算法分析(Algorithm analysis can be further used)
- 2019-11-06 10:54:44下载
- 积分:1
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单相整流(包括3中控制方法)
提供三种控制方式:单相PWM整流瞬态电流直接控制;单相PWM整流预测电流控制;单相PWM整流虚拟dq坐标控制(Three control modes are provided: single-phase PWM rectifier transient current direct control; single-phase PWM rectifier predictive current control; single-phase PWM rectifier virtual dq coordinate control.)
- 2021-03-14 21:49:23下载
- 积分:1
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Prentice.Hall.PTR.AJAX.Creating.Web.Pages.with
While I was in college, sometime during the Pliocene, I took a science fiction class. The interesting thing about this class is that one student didn t realize until midterms that it wasn t a physiology class. I bring this up only because if you ve picked up this book expecting Corinthian helmets and hoplites, which, incidentally, have one-third less fat than regular hops (useful information for Hydras on a diet), this is the wrong book.
- 2010-02-03 17:22:16下载
- 积分:1
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AY_Emul_Version24_7
说明: ay emulator4 code in c language
- 2020-06-17 01:00:01下载
- 积分:1
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格兰杰因果检验
说明: Python格兰杰因果检验的一些论文,详细展示了格兰杰因果检验的逻辑。(Granger Causility test)
- 2020-06-16 22:20:01下载
- 积分:1
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Transfer-master
说明: 一个实现迁移学习的小程序,例子还是很有用的。。。。。。。。。。。。。。。。。。。。。。。。。。。(A small program to achieve transfer learning, examples are still very useful...........................................)
- 2019-10-14 21:06:39下载
- 积分:1
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dds_test
直接数字式频率合成器DDS设计、Verilog。
产生的信号可以是正弦波或方波、三角波、锯齿波等,自选。
采用DDS技术,将所需生成的波形写入ROM中,按照相位累加原理合成任意波形。
此方案得到的波形稳定,精度高,产生波形频率范围大,容易产生高频。
本实验在设计的模块中,包含以下功能:
(1)通过 freq 信号输入需要的频率的值;
(2)通过 wave_sel 信号选择所需的波形;
(3)通过 amp_adj 信号选择波形放大的倍数。(DDS design of direct digital frequency synthesizer, Verilog.
The generated signal can be sinusoidal or square wave, triangular wave, sawtooth wave and so on, optional.
By using DDS technology, the required waveforms are written into ROM, and arbitrary waveforms are synthesized according to the principle of phase accumulation.
The waveform obtained by this scheme is stable, accurate and easy to generate high frequency waveform.
This experiment includes the following functions in the designed module:
(1) Input the required frequency value through freq signal;
(2) Choosing the required waveform by wave_sel signal;
(3) Select the multiplier of waveform amplification by amp_adj signal.)
- 2019-01-19 16:07:50下载
- 积分:1