登录
首页 » Verilog » verilog HDL

verilog HDL

于 2020-09-04 发布
0 293
下载积分: 1 下载次数: 4

代码说明:

说明:  DS18B20温度模块,LCD1602显示(DS18B20 Temperature Module, LCD1602 Display)

文件列表:

verilog HDL, 0 , 2014-07-04
verilog HDL\DS1802, 0 , 2014-06-24
verilog HDL\DS1802\da0832.v, 1575 , 2014-06-24
verilog HDL\DS1802\da0832.v.bak, 703 , 2014-06-24
verilog HDL\DS1802\da18.asm.rpt, 7835 , 2014-06-24
verilog HDL\DS1802\da18.cdf, 320 , 2014-06-24
verilog HDL\DS1802\da18.done, 26 , 2014-06-24
verilog HDL\DS1802\da18.dpf, 1179 , 2014-06-24
verilog HDL\DS1802\da18.fit.rpt, 178115 , 2014-06-24
verilog HDL\DS1802\da18.fit.smsg, 513 , 2014-06-24
verilog HDL\DS1802\da18.fit.summary, 593 , 2014-06-24
verilog HDL\DS1802\da18.flow.rpt, 8211 , 2014-06-24
verilog HDL\DS1802\da18.map.rpt, 53006 , 2014-06-24
verilog HDL\DS1802\da18.map.smsg, 405 , 2014-06-24
verilog HDL\DS1802\da18.map.summary, 457 , 2014-06-24
verilog HDL\DS1802\da18.pin, 20250 , 2014-06-24
verilog HDL\DS1802\da18.pof, 524475 , 2014-06-24
verilog HDL\DS1802\da18.qpf, 1260 , 2014-06-24
verilog HDL\DS1802\da18.qsf, 4611 , 2014-06-24
verilog HDL\DS1802\da18.sof, 358317 , 2014-06-24
verilog HDL\DS1802\da18.sta.rpt, 696995 , 2014-06-24
verilog HDL\DS1802\da18.sta.summary, 4593 , 2014-06-24
verilog HDL\DS1802\da18.v, 542 , 2019-05-28
verilog HDL\DS1802\da18.v.bak, 304 , 2014-06-24
verilog HDL\DS1802\db, 0 , 2014-06-24
verilog HDL\DS1802\db\da18.(0).cnf.cdb, 2012 , 2014-06-24
verilog HDL\DS1802\db\da18.(0).cnf.hdb, 1101 , 2014-06-24
verilog HDL\DS1802\db\da18.(1).cnf.cdb, 44832 , 2014-06-24
verilog HDL\DS1802\db\da18.(1).cnf.hdb, 3250 , 2014-06-24
verilog HDL\DS1802\db\da18.(2).cnf.cdb, 16937 , 2014-06-24
verilog HDL\DS1802\db\da18.(2).cnf.hdb, 2489 , 2014-06-24
verilog HDL\DS1802\db\da18.(3).cnf.cdb, 5900 , 2014-06-24
verilog HDL\DS1802\db\da18.(3).cnf.hdb, 1779 , 2014-06-24
verilog HDL\DS1802\db\da18.amm.cdb, 541 , 2014-06-24
verilog HDL\DS1802\db\da18.asm.qmsg, 2184 , 2014-06-24
verilog HDL\DS1802\db\da18.asm.rdb, 1407 , 2014-06-24
verilog HDL\DS1802\db\da18.asm_labs.ddb, 11843 , 2014-06-24
verilog HDL\DS1802\db\da18.cbx.xml, 86 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.bpm, 831 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.cdb, 70605 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.hdb, 19204 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.kpt, 197 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.logdb, 15176 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp.rdb, 21475 , 2014-06-24
verilog HDL\DS1802\db\da18.cmp_merge.kpt, 201 , 2014-06-24
verilog HDL\DS1802\db\da18.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd, 746340 , 2014-06-24
verilog HDL\DS1802\db\da18.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd, 745247 , 2014-06-24
verilog HDL\DS1802\db\da18.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd, 740378 , 2014-06-24
verilog HDL\DS1802\db\da18.db_info, 138 , 2014-06-24
verilog HDL\DS1802\db\da18.fit.qmsg, 32721 , 2014-06-24
verilog HDL\DS1802\db\da18.hier_info, 6304 , 2014-06-24
verilog HDL\DS1802\db\da18.hif, 3888 , 2014-06-24
verilog HDL\DS1802\db\da18.idb.cdb, 9158 , 2014-06-24
verilog HDL\DS1802\db\da18.lpc.html, 1588 , 2014-06-24
verilog HDL\DS1802\db\da18.lpc.rdb, 491 , 2014-06-24
verilog HDL\DS1802\db\da18.lpc.txt, 1926 , 2014-06-24
verilog HDL\DS1802\db\da18.map.bpm, 794 , 2014-06-24
verilog HDL\DS1802\db\da18.map.cdb, 20473 , 2014-06-24
verilog HDL\DS1802\db\da18.map.hdb, 18502 , 2014-06-24
verilog HDL\DS1802\db\da18.map.kpt, 5908 , 2014-06-24
verilog HDL\DS1802\db\da18.map.logdb, 4 , 2014-06-24
verilog HDL\DS1802\db\da18.map.qmsg, 22241 , 2014-06-24
verilog HDL\DS1802\db\da18.map_bb.cdb, 1160 , 2014-06-24
verilog HDL\DS1802\db\da18.map_bb.hdb, 9277 , 2014-06-24
verilog HDL\DS1802\db\da18.map_bb.logdb, 4 , 2014-06-24
verilog HDL\DS1802\db\da18.pre_map.cdb, 69273 , 2014-06-24
verilog HDL\DS1802\db\da18.pre_map.hdb, 15598 , 2014-06-24
verilog HDL\DS1802\db\da18.rtlv.hdb, 15467 , 2014-06-24
verilog HDL\DS1802\db\da18.rtlv_sg.cdb, 69775 , 2014-06-24
verilog HDL\DS1802\db\da18.rtlv_sg_swap.cdb, 1339 , 2014-06-24
verilog HDL\DS1802\db\da18.sgdiff.cdb, 28163 , 2014-06-24
verilog HDL\DS1802\db\da18.sgdiff.hdb, 16655 , 2014-06-24
verilog HDL\DS1802\db\da18.sld_design_entry.sci, 197 , 2014-06-24
verilog HDL\DS1802\db\da18.sld_design_entry_dsc.sci, 197 , 2014-06-24
verilog HDL\DS1802\db\da18.smart_action.txt, 6 , 2014-06-24
verilog HDL\DS1802\db\da18.smp_dump.txt, 2884 , 2014-06-24
verilog HDL\DS1802\db\da18.sta.qmsg, 102622 , 2014-06-24
verilog HDL\DS1802\db\da18.sta.rdb, 51148 , 2014-06-24
verilog HDL\DS1802\db\da18.sta_cmp.8_slow_1200mv_85c.tdb, 74031 , 2014-06-24
verilog HDL\DS1802\db\da18.syn_hier_info, 0 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.fastest_slow_1200mv_0c.ddb, 148200 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.fastest_slow_1200mv_85c.ddb, 147904 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.fast_1200mv_0c.ddb, 319194 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.slow_1200mv_0c.ddb, 322669 , 2014-06-24
verilog HDL\DS1802\db\da18.tiscmp.slow_1200mv_85c.ddb, 322212 , 2014-06-24
verilog HDL\DS1802\db\da18.tis_db_list.ddb, 231 , 2014-06-24
verilog HDL\DS1802\db\logic_util_heursitic.dat, 22308 , 2014-06-24
verilog HDL\DS1802\db\prev_cmp_da18.qmsg, 160270 , 2014-06-24
verilog HDL\DS1802\incremental_db, 0 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions, 0 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.db_info, 138 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.cdb, 29719 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.dfp, 33 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.hdb, 18932 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.kpt, 199 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.logdb, 4 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.cmp.rcfdb, 34011 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.map.cdb, 20314 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.map.dpi, 1261 , 2014-06-24
verilog HDL\DS1802\incremental_db\compiled_partitions\da18.root_partition.map.hbdb.cdb, 604 , 2014-06-24

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • pcsc3_v2.01.09
    PCSC APDU specification.
    2011-11-07 19:53:52下载
    积分:1
  • Demo
    串口通信初学者的好用例程,自己学习的时候用过,还可以。(serial port communication sample)
    2018-06-12 23:10:28下载
    积分:1
  • word文档对球形译码的理论原理和仿真code
    word文档对球形译码的理论原理和仿真结果进行了分析 1.sphereandML是主程序,性能接近最大似然ML检测,调用了spheredecode和spheredecodeinf两个子程序; 2.main_spheretoML是主程序,性能达到最大似然NL检测,调用了spheredecodetoML和spheredecodeinftoML两个子程序。(word document on the theory of spherical decoding theory and simulation results are analyzed 1.sphereandML are the main program, performance close to the maximum likelihood ML detection, call the spheredecode and two spheredecodeinf subprogram 2.main_spheretoML are the main program, to achieve maximum performance Ran Detect NL, call a subroutine spheredecodetoML and two spheredecodeinftoML.)
    2021-03-31 17:59:08下载
    积分:1
  • ofdmwaterfilling
    OFDM waterfilling algorithm
    2021-04-06 15:19:02下载
    积分:1
  • BTBook-(1)
    This is book about bluetooth programming and other items. Is good for beginerss.
    2014-02-22 01:07:18下载
    积分:1
  • CRC
    Sample code in VB.NET for calculate and check CRC (Modbus specification). Supported both string format (like MSComm) and bytes array(like DCB).
    2010-03-10 23:25:16下载
    积分:1
  • 注释齐全
    说明:  MIMO线性预编码的ZF,MMSE算法,程序可以直接运行并且注释齐全,大胆放心下载吧(ZF, MMSE algorithm of MIMO Linear Precoding)
    2021-04-07 15:09:01下载
    积分:1
  • ECA_RD_DRM
    说明:  产生复高斯的白噪声,这和matlab 自带的不一样,容易理解,但是经对比还是和自带的有区别的(AWGN noice we are very nice. please try to run it snd you will find you are good too.)
    2019-05-16 21:43:25下载
    积分:1
  • tongxun
    用winsock实现两机通讯的一个小软件 特别简单 不再具体介绍(Winsock implementation to use two planes, a small communications software in particular is no longer easy introduction of specific)
    2009-03-06 09:33:16下载
    积分:1
  • Systemview-software-simulation
    Systemview动态系统仿真软件是为方便大家轻松的利用计算机作为工具,以实现设计和仿真工作。它特别适合于无线电话(GSM,CDMA,FDMA,TDMA)和无绳电话,寻呼,机和调制解调器与卫星通信(GPS,DBS,LEOS)设计。能够仿真( 等)DSP结构,进行各种时域和频域分析和谱分析。(Systemview dynamic system simulation software is easy for us to facilitate the use of computers as a tool to achieve the design and simulation work. It is especially suitable for wireless phone (GSM, CDMA, FDMA, TDMA) and cordless telephones, paging, machine and modem and satellite communication (GPS, DBS, LEOS) design. To simulation (and other) DSP structure, various time domain and frequency domain analysis and spectral analysis.)
    2011-05-29 16:27:53下载
    积分:1
  • 696516资源总数
  • 106914会员总数
  • 0今日下载