13位巴克码时域波形及其自相关函数

In this paper, we present and analyze efficient frame synchronization and frequency offset compensation scheme with ternary sequences for an orthogonal frequency division multiplexing (OFDM) system in Rayleigh fading channels. Frame synchronization is an essential procedure for normal operation of the OFDM system because of sensitivity to synchronization errors. And when there are frequency offsets in OFDM frame, the loss of orthogonality occurs and the interference problem among several subcarriers is introduced. These fact leads to the requirement for joint implementation of the frame synchronization and frequency offset compensation.

cdma2000的系统建模及实现 包括信源编码,信道编码,扩频,调制,(The system modeling and implementation of cdma2000 include source coding, channel coding, spread spectrum, modulation,)

线性调频脉冲信号（Chirp信号）脉冲压缩实验，40MHz和400MHz时的chirp信号仿真以及STFT（短时傅里叶变换）。(Linear frequency modulated pulse compression experiment (Chirp signal), Chirp signal simulation at 40MHz and 400MHz, and STFT (short-time Fourier transform).)

说明：  是一个关于信道容量和信道估计的很全面的matlab源程序(is one of the channel capacity and channel estimation of the very comprehensive source Matlab)

其中包含了OFDM系统的简单仿真，有SLM算法输入输出的比较，PAPR明显降低(Which contains a simple simulation of the OFDM system, the comparison of the input and output of SLM algorithm, PAPR is significantly reduced)

一个可以用语音modem录音放音的Delphi控件源码(A modem with voice recording playback control of Delphi source code)

手机RSS阅读器(html5)，应用程序编程源码，很好的参考资料。(Mobile phone RSS reader (HTML5), application programming source code, a good reference.)

说明：  信号样本自相关分析，IQ两路绘制波形，频偏估计(Signal sample autocorrelation analysis, IQ two-way waveform drawing, frequency offset estimation)

本文介绍了基于DCT 的图像压缩编码技术, 并给出了具体的实现方法和步骤, 既保证具有较高的压缩比, 又保证了较好的图像 质量。(This paper introduces the coding of image based on DCT , therefore,shows the details of realization . It provides high compressibility and high quality.)

本文研究了SMBus 规范，介绍了典型的基于片上系统（SoC）设计的知识产权核（IP）实现，采用自顶向下 (Top-down)的集成电路设计方法完成了设计，并架构了基于总线功能模型(BFM)的验证平台 完成功能仿真，顺利完成了逻辑综合和时序仿真。FPGA 验证和投片后测试均表明设计具有 良好的性能。(This paper studies the SMBus specification, based on the introduction of the typical system-on-chip (SoC) intellectual property core design (IP) implementation, using top-down (Top-down) of the integrated circuit design methods achieve a design and architecture based on the total Line functional model (BFM) achieve functional verification platform for simulation, successfully completed a logic synthesis and timing simulation. FPGA silicon validation and post-tests show that the design has good performance.)