apdu4j-master

说明：  利用 Ｑｕａｒｔｕｓ　ＩＩ和 ＭｏｄｅｌＳｉｍ 软件，基于 ＥＰ２Ｃ３５芯片 ＦＰＧＡ 开发平台，通过 Ｖｅｒｉｌｏｇ－ＨＤＬ语言，完成了 Ｏ－ＱＰＳＫ 调 制解调器的设计。该设计具有结构简单占用芯片面积少便于生成ＩＰ核等优点。 电路与系统的仿真结果表明，所预期的功能均已实现，该方法适合在无线传感器 网络及低功耗通信集成电路设计中应用。(Using QuartusII and Modelsim software, based on ep2c35 chip FPGA development platform, the O-QPSK modem is designed by Verilog-HDL language. The design has the advantages of simple structure, less chip area and easy to generate IP core. The simulation results of the circuit and the system show that the expected functions have been realized, and the method is suitable for the design of wireless sensor networks and low-power communication integrated circuits.)

TMS320F2812(SCH+PCB图)Protel -TMS320F2812 (SCH+ PCB Chart) Protel

此文件为液晶驱动芯片 为三星的KS0093 主要用在COG上-this document for LCD driver chips for Samsung KS0093 spent mainly on the COG

说明：  EXAMPLE OF PSSE simulations and python scripting (solar PV)

50Hz陷波器设计(matlab),去除工频干扰-filter

基于CSM自适应波束形成——酉聚焦 ％ 8阵列； ％信噪比为10dB 干扰噪声比为20dB 干扰信号与需要信号不相关. ％干扰和信号频率所在范围为80—120Hz，相对带宽为40％ ，入射角度分别为seta_S_reg、seta_J_reg (CSM-based adaptive beamforming- Unitary Highlights 8 array 10dB signal to noise ratio for the interference noise ratio of 20dB interference signal and the need to signal irrelevant. Interference and signal frequency range is where the 80-120Hz, the relative bandwidth of 40 , respectively angle seta_S_reg, seta_J_reg)

论文压缩计算鬼成像《Compressive sensing computational ghost imaging》的附带原码，可实现压缩鬼成像的仿真。已跑通(Compression calculation ghost imaging code, can achieve compression ghost imaging simulation.)

工件加工问题，本程序提供了工件加工问题的一般算法question1 question2 question3经过调试能成功运行-workpiece machining, the process of machining the general algorithm question1 question2 question3 after the successful operation Debugging

机器学习预测分析python程序，很有用的啊，希望对大家有帮助(Machine learning prediction analysis Python procedures, very useful ah!)

飞思卡尔双车断道会车鹊桥相会，好好调试，摄像头四轮加电磁三轮，两套代码(Freescale double car road will meet magicbridge meet, good debugging, camera four wheels and electromagnetic three wheels, two sets of code)