PennState_III-V_TFET_VA_Model_1.0.1
于 2017-05-30 发布
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//VerilogA for double-gate GaSb-InAs Heterojunction Tunnel FET model based on lookup tables, which employs the current and capacitance characteristics calibrated TCAD Sentaurus Simulations //Model details: V. Saripalli et al IEEE/ACM NanoArch 2011. //Original Model Developed by V. Saripalli //Implemented by H. Liu
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