RSverilog

  RS编码的verilog源代码，拿来和大家分享(RS-coded Verilog source code, used to share)

RS_19_31_EP1C6Q240_TEST verilog
...............................\RS_19_31_EP1C6Q240_TEST2
...............................\........................\adderror_test.vwf
...............................\........................\Clock.bsf
...............................\........................\Clock.v
...............................\........................\common_modules.v
...............................\........................\CSEEBLOCK.v
...............................\........................\db
...............................\........................\..\altsyncram_52i1.tdf
...............................\........................\..\altsyncram_lva1.tdf
...............................\........................\..\RS_encode_and_decode.smp_dump.txt
...............................\........................\..\top.analyze_file.qmsg
...............................\........................\..\top.asm.qmsg
...............................\........................\..\top.cbx.xml
...............................\........................\..\top.cmp.cdb
...............................\........................\..\top.cmp.hdb
...............................\........................\..\top.cmp.qrpt
...............................\........................\..\top.cmp.rdb
...............................\........................\..\top.cmp.tdb
...............................\........................\..\top.cmp0.ddb
...............................\........................\..\top.dbp
...............................\........................\..\top.db_info
...............................\........................\..\top.eco.cdb
...............................\........................\..\top.eds_overflow
...............................\........................\..\top.fit.qmsg
...............................\........................\..\top.hier_info
...............................\........................\..\top.hif
...............................\........................\..\top.map.cdb
...............................\........................\..\top.map.hdb
...............................\........................\..\top.map.qmsg
...............................\........................\..\top.pre_map.cdb
...............................\........................\..\top.pre_map.hdb
...............................\........................\..\top.psp
...............................\........................\..\top.rtlv.hdb
...............................\........................\..\top.rtlv_sg.cdb
...............................\........................\..\top.rtlv_sg_swap.cdb
...............................\........................\..\top.sgdiff.cdb
...............................\........................\..\top.sgdiff.hdb
...............................\........................\..\top.signalprobe.cdb
...............................\........................\..\top.sim.hdb
...............................\........................\..\top.sim.qmsg
...............................\........................\..\top.sim.qrpt
...............................\........................\..\top.sim.rdb
...............................\........................\..\top.sim.vwf
...............................\........................\..\top.sld_design_entry.sci
...............................\........................\..\top.sld_design_entry_dsc.sci
...............................\........................\..\top.syn_hier_info
...............................\........................\..\top.tan.qmsg
...............................\........................\..\wed.wsf
...............................\........................\DEcontroller.v
...............................\........................\error.bsf
...............................\........................\error.v
...............................\........................\fifo_register.v
...............................\........................\frequency divider.v
...............................\........................\KESBLOCK.V
...............................\........................\nrz.bsf
...............................\........................\pll.bsf
...............................\........................\pll.cmp
...............................\........................\pll.v
...............................\........................\Pll_57Mto31M.v
...............................\........................\pll_57_31.v
...............................\........................\pll_bb.v

...............................\........................\pll_waveforms.html
...............................\........................\RAM.v
...............................\........................\RAM_fifo_all.v
...............................\........................\rs.bdf
...............................\........................\rs.vwf
...............................\........................\rsdecode.v
...............................\........................\RSDecoder.bsf
...............................\........................\RSDecoder.v
...............................\........................\rsencode.v
...............................\........................\RSEncoder.bsf
...............................\........................\RSEncoder.v
...............................\........................\RS_encode_and_decode.qpf
...............................\........................\RS_encode_and_decode.qws
...............................\........................\SCBLOCK.V
...............................\........................\serial_paralled_conversion.v
...............................\........................\source_nrz.v
...............................\........................\top.asm.rpt
...............................\........................\top.cdf
...............................\........................\top.done
...............................\........................\top.dpf
...............................\........................\top.fit.eqn
...............................\........................\top.fit.rpt
...............................\........................\top.fit.smsg
...............................\........................\top.fit.summary
...............................\........................\top.flow.rpt
...............................\........................\top.map.eqn
...............................\........................\top.map.rpt
...............................\........................\top.map.smsg
...............................\........................\top.map.summary
...............................\........................\top.pin
...............................\........................\top.pof
...............................\........................\top.qsf
...............................\........................\top.sim.rpt
...............................\........................\top.sof
...............................\........................\top.tan.rpt
...............................\........................\top.tan.summary
...............................\........................\top.v