Cadence

cnc windows 中文翻译， 工程案例(cnc windows cnc windows)

FPGA实现FIR抽取滤波器的设计　采用基于分布式思想的方法来设计FIR滤波器。(FPGA realization of FIR decimation filter design ideas based on a distributed approach to design FIR filters.)

智能家居设计方案。主要有几个模块组成：门禁驱动，无线管理、QT图形界面(Intelligent home design.)

Eagle cadsoft library ADE7758 power meter i ade

这个是我2006年的毕业设计，从理论到伺服电机的位置控制实现，我一个人用了4个月的时间来搞，现在把整篇论文和程序都上传到这里来，希望可以对初学电机驱动的朋友有帮助。(This is my 2006, graduation design, from theory to the servo motor position control, a person I used 4 months time to do, now the entire papers and procedures are uploaded here, hope can be for beginners motor drive has to help a friend. )

CTCS-3级列控系统总体技术方案 (Class CTCS-3 train control system overall technical program )

说明：  以齿轮箱的历史故障数据为依据,提出了齿轮故障诊断数据仓库的功能架构,并对数据的收 集、集成、存储等方面进行了研究,建立了齿轮故障诊断模型。为齿轮故障诊断提供了一种新的方法。 (The functional structure of datawarehouse of gear fault diagnosis is proposed based on gear fault date previously. Research on data collect, data integration, data storage is carried out. The diagnosis model of gear fault diagnosis is established. A newmethod of gear fault diagnosis is provided )

HVAC part 01-By Eng.Ramy Ghoraba

约束所有时钟（包括你的设计中特有的时钟）对准确的时序分析结果而言是必不可少的。Quartus II TimeQuest Timing Analyzer为各种各样的时钟配置和典型时钟提供许多SDC命令。(Constraining all clocks, including the clocks unique to your design, is essential for accurate timing analysis results. The Quartus II TimeQuest Timing Analyzer provides many SDC commands for a variety of clock configurations and typical clocks.)

很好的硕士论文，学习相控阵技术的重要资料。(Good master thesis, learn important information of phased array technology.)