nuttallwindowFFT

MATLAB 下的数字信号处理实现示例 理想采样信号序列 (MATLAB under the digital signal processing to achieve the ideal example of the sampling signal sequence)

电子通信系统的建模与仿真 第10章 声学仿真 10.1 回声试验 10.2 多普勒效应 10.3 声学信号的滤波特性试验 10.4 交混回响 10.5 短时傅立叶变换(Electronic communications system modeling and simulation of Chapter 10 Simulation 10.1 acoustic echo test 10.2 Doppler Effect 10.3 acoustic signal filtering properties of the mixed response from the pilot pay 10.4 STFT 10.5)

蚁群算法求解连续函数最优解的代码。学习蚁群算法寻优的必要法宝(ant matlab code for studying)

说明：  基于输出参考的模型自适应控制程序，基于输出参考的模型自适应程序(Direct Model Reference Adaptive Control Based on RBF Network)

认知无线电频谱感知方面的文章，希望对你有用(Cognitive radio spectrum sensing for articles, I hope useful to you)

MIMO系统容量的仿真程序来研究MIMO系统的容量可用于学习。(MIMO system capacity simulation program to study the MIMO system capacity can be used to learn.)

精通《MATLAB7》书中的实例，可以借鉴一下，很不错。(Proficient " MATLAB7" book instance, can learn about, very good.)

Matlab下实现huffman编码 在MATLAB中模拟c中链表 利用复数运算(Matlab under huffman coding in the MATLAB simulation of c in the list in the use of the plural operation)

MATLAB综合教程.rar(comprehensive directory. Rar)

在这项工作中,我们提出一个基于混沌的集成　　抖动升压电路用于多个振荡器抽样真的　　随机数发生器的架构。多个环形振荡器　　真正的随机数生成器需要大量　　戒指的积累内在抖动的逆变器　　有用的水平。因此,他们占领大的硅区域和消费　　大量的权力。该电路提供　　另一种方法推动使用混乱的抖动　　动态生成的两个环形振荡器的非线性耦合　　需要更少的组件的数量。的简单性　　提出了电路提供高集成和内在潜力　　面积和功耗低等优点。混沌动力学　　研究了电路的使用数值和电路　　模拟。测量测试芯片实现的结果　　250纳米CMOS技术(In this work, we present a chaos based integrated jitter booster circuit for use in multiple oscillator sampling true random number generator architecture. Multiple ring oscillator based true random number generators need significant number of rings for accumulating the intrinsic jitter of inverters to a useful level. Thus, they occupy large silicon area and consume considerable amount of power. The proposed circuit offers an alternative approach for boosting jitter using the chaotic dynamics generated by non-linear coupling of two ring oscillators that require fewer number of components. The simplicity of the proposed circuit offers high integration potential with inherent low area and power consumption advantages. Chaotic dynamics of the circuit was studied using both numerical and circuit simulations. Measurement results of the test chip implemented at 250nm CMOS technology node confirmed chaotic behavior and jitter boosting capability. To the very best of our knowled)