Quadrature-amplitude-modulation---Wikipedia--the-

matlab BPSK RAYLEIGH

在MATLAB上设计一个（2，1，3）卷积编码器和对应的采用维特比译码算法的译码器。编码器的生成多项式为：[1 0 1；1 1 1]。将编码器的输出经过一个高斯白噪声信道的结果作为译码器的输入，观察比较译码器输出和编码器输入，了解卷积码的容错性，并计算译码结果的误比特率.(A convolutional coder (2, 1, 3) and corresponding decoder using Vitby decoding algorithm are designed on MATLAB. The generating polynomial of encoder is: [1 01; 11 1]. The output of the encoder through a Gauss white noise channel as a result of the decoder input, compare the output of the decoder and encoder input, understand the fault tolerance of convolutional code, and calculate the decoding results of bit error rate.)

最大比合并（MRC）的分集合并程序；调制方式BPSK;瑞利信道(The diversity merging program of the maximum ratio combination (MRC); modulation mode BPSK; Rayleigh channel)

针对传统线性调频(LFM)信号参数估计算法中复杂的搜索和计算问题，提出了一种不需要参数搜索的快速 LFM信号参数估计算法。该算法先用希尔伯特变换估计LFM信号瞬时相位，再用二次相位函数拟合LFM信号瞬 时相位从而得到初始频率和调频斜率的估计(The traditional linear frequency modulation (LFM) signal parameter estimation algorithms and computational complexity of the search problem, we propose a fast search without LFM signal parameter estimation algorithm. The algorithm first estimated with the Hilbert transform of LFM signal instantaneous phase, and then the second phase of LFM signal instantaneous phase function fitting to obtain the initial estimates of the frequency and chirp rate)

Including how to click a picture as a hyperlink to the site, pictures can be their own choice,

用于调制识别的代码，通过提取特征参数，实现bpsk，qpsk等调制方式的识别(For modulation recognition code, through the extraction of characteristic parameters, implementation bpsk, qpsk forms of identification, such as modulation)

S7-200以太网通讯图文教程 S7-200通过CP243-1或 CP243_1IT接入工业以太网。 S7-200以太网通信主要有以下几种方式： ★ S7-200之间的以太网通信 ★ S7-200与S7-300/400之间的以太网通信 ★ S7-200与OPC及WINCC的以太网通信 (S7-200 Ethernet communication graphic tutorial )

用于检测手机麦克风输入音量大小的DEMO(it s used to detect the volume of phones micphone)

16QAM调制下的OFDM通信系统,代码完善，包括解调程序，和调制程序(OFDM system under 16QAM modulation)

说明：  用hspice写了一个做了16bit kogge stone四层点操作的树形加法器静态逻辑网表，所有管子的尺寸按照0.25u的尺寸设计挂上测试文件跑以后逻辑没问题，但是按照拉贝尔那本书上讲的关于逻辑努力优化的方法优化，在输入级加了两级buffer，只对最长路径支路尺寸优化(Use HSPICE to write a 16bit kogge made stone four layer tree adder static logic netlist, all pipe sizes according to the size of design 0.25u hang test file to run after the logic is no problem, but in accordance with the method of logic optimization efforts of Labelle's book about the optimization, plus two buffer in the input stage, only the longest path branch size optimization)